MPC82xx processor-based and proprietary codec chip design of DVR

In recent years, the DVR application areas in the security monitoring and more widely, traditional analog video technology is gradually being replaced by digital video recording technology, which can achieve better image quality and offer greater storage capacity.

Current DVR has widely applied to the financial, cultural, hotels, transport, Commerce, hospitals, factories, schools, buildings, residential property management, etc. From the development trend, multi-media monitoring system applications continue to expand.

Currently, there are already some companies launched a x 86 based DVR, but power consumption, cost, volume, stability or lacking.

Huaheng technology currently available based on the PowerPC embedded Linux development platform can meet the application described in this article is for PowerPC processors and dedicated audio and video codec chip as the core development of DVR product design. The design uses Embedded PowerPC CPU for system control, storage, transport, etc., as well as the use of chip implementation MPEG-1,-2,-4 audio and video codec, suitable for high-end DVR development.

Embedded operating system

PowerPC CPU embedded operating system is the important basis of the software.

And Windows, Linux on the market, there are several releases, all release versions contain the same Linux kernel and basic tools and applications, different distributions mainly in additional tool chain, application, configuration, and differs in various kernel patch. Embedded Linux mainly in real-time performance enhancement, kernel streamlining and reduction, support for multiple CPU architectures (such as PowerPC CPU) have done a modified and improved. Especially because Linux support for network for good, a lot of servers, network devices are now developing based on the Linux operating system.

Current PowerPC processor running on an operating system with MMU ppcLinux Linux operating system, and designed for PowerPC processors for the reduction and optimization.

We are using the official publication of the open source free version, the developer does not need to consider licensing and billing issues.

Development of software based ppcLinux can be prepared based on the C language, but also supports the C + +, Java, etc., used for PowerPC GNU GCC compilation tools compilation, and in General on development of the Linux operating system.

And in general the Linux operating system on the development of software most easily ported over. In the development of peripheral interface driver, ppcLinux support kernel loads, and loads the dynamic insmod for developer extension interface, peripheral functions provides great convenience.

Embedded processor

MPC82xx is Freescale Power QUICC II series of 32-bit embedded processor.

The series of processors for network infrastructure, storage devices and telecommunication product needs SoC integration and PCI connected systems application needs, provides a framework based on PowerPC of high cost performance. Its main applications include: DVR system; the router/switch; embedded computing; network storage; remote Hub; RAID system disk control system; LAN to WAN bridge/router; xDSL systems.

MPC8250 PowerQUICC II series is the most advanced of the market for telecommunications and networks and the design of a microprocessor integrated communication.

And similar to MPC8250 MPC860 also has two major components: the Embedded PowerPC cores and communication processing module (CPM). Since CPM share the Embedded PowerPC cores of peripheral work tasks, this dual-processor architecture power consumption is lower than the traditional architecture of the processor. CPM while supporting three fast serial communication controllers (FCC), 1 multi channel controller (MCC), 4 x serial communication controllers (SCC), 2 x serial management controller (SMC), 1 x serial peripheral interface (SPI) and a I2C interface.

MPC8250 1.5W low power consumption,-40 ° C to 105 ° C temperature range, is that features and high-performance chips for two other good characteristics.

Huaheng that chip with huaheng embedded Linux v3.0 operating system integration HHPPC8250-3FEC-PCI-R1-Development Kit for users on a network and communication products to provide enormous development potential and help customers to shorten the development cycle and accelerate.

At present the science and technology based on huaheng MPC8250 development platform: you can support the standard PCI interface PCI-IDE array cards, video cards, USB interface cards, WLAN wireless network cards, WLAN MiniPCI wireless card interfaces, developers can be based on basic development platform free extensions, integration of different applications.

The series processors to choose from are MPC8241/8245, MPC8260, etc.

Codec chip select

The original video data volume is large, the need for very high bandwidth.

If you need to make a long video, storage, and must guarantee a certain image quality through compression techniques to minimize the video bit rate, reduce the amount of data to be stored, in order to meet more of storage requirements and reduce costs, while also can better meet the requirements of network monitoring. At present the network monitoring, video on demand application, such as product MPEG-4 format video compression algorithm is more popular, the bit rate is generally around several hundred Kbps to 1Mbps.

Video compression algorithm efficiency determine monitoring products of image quality and application.

To achieve sophisticated decoding algorithm, you need toA lot of research and development resources, and using the appropriate codec ASIC chip you can avoid the software algorithm inputs.

VW2010 is real-time MPEG-1,-2 and-4 audio/video decoding chip system (both compression and decompression or encoding and decoding), fully compatible with ISO/IEC-11172-2, ISO/IEC-13818-2, ISO/IEC-14496-2 and ITU-T H.263 (baseline).

Video encoders receive uncompressed ITU-R.BT.656 digital video signal. It will enter and compressed video converted to MPEG-1,-2,-4 and H.263 formats.

The audio coding section receive dual-channel discrete I2S digital audio format data and input filtering function, it can be converted to a per-channel audio MPEG-2 MPEG-1, MP3, AAC, or AC-3 audio format.

Application for network VW2010 output stream, or to store application output program flow. MPEG video decoding part to receive and output bit-stream ITU-R.BT.656 digital video. Audio decoder receives MPEG-1, MPEG-2, MP3, AAC or AC-3 bit stream and the output S/I2S, P-DIF or IEC-61937 compressed audio. VW2010 is the DVR system complete audio and video codec's main chip.

VW2010 not only produces the MPEG-2 format of the data stream, and can produce MPEG-4 formatted data stream.

It compresses the data rate can be adjusted between 128Kbps to 6Mbps to accommodate the needs of various users. Low bit rate files suitable for network transmission and save storage space, and high bit-rate of the file has the best sound, Visual playback. Also, you can separate encoding audio VW2010 data and can realize functions of MP3.

Listed below are some of the current application in the DVR products more extensive audio and video codec chip for programmes:

ASIC：IME6400、Vweb2010、Wis7007；

Blackfin DSP: 532 plus multimedia PCI Bridge SAA7146, PNX1302 plus screen split chip AQ424;

High-end: PNX1501, DM642.

System composition and characteristics

The system's core chip only two tablets (VW2010 and MPC8250), and can use standard PCI bus complete interactive control.

Embedded CPU MPC8250 integration, not only conserves the traditional PCI Bridge chip, Ethernet MAC, also reduces peripheral circuit design difficulty and effort. VW2010 external A/D and D/A, chip can MPC8250 serial I2C interface, easily completed the appropriate initialize and format conversion. The entire system on a very low power category requirements, reducing the power part of the design pressure and costs. Due to the use of embedded Linux operating system, and the processor's own directives and General x 86 processors, hard to be a hacker and virus attack, ensure that the entire system of safety performance. The system architecture as in Figure 1.

　　

Video signal through video receiver front-end processing (including impedance matching, limiting and clamp), and then through the video decoder conforms VW2010 video interface standard ITU656 signal.

Video decoding circuit's core is a video decoder, the decoder chip for CVBS signal A/D conversion and encoding, to produce ITU656-standard parallel digital TV signal. Upscale video decoder also supports image size scaling (scaling) and the frame extraction (decimating) features, such as Philips, SAA7114, SAA7115 and Rockwell company BT829A, etc. Due to the video input for VW2010 ITU656/D1 format, so you only need to select a basic A/D conversion and encoding video input processing chips such as SAA7113.

In analog audio signal is analog audio receiver front-end processing, by audio ADC circuit produced conform to the standards of VW2010 audio interface I2S signal.

VW2010 is compression card core processing chip, the chip can complete audio and video encoding, but also provides the decoder and ADC's control (by I2S bus), the encoding of the MPEG stream is available through the chip integrated PCI interface output.

The unzip operation is VW2010 compression operations of the inverse process, similar to the basic principle.

In the configuration of your system VW2010 will the audio and video signal compression coding for MPEG-1,-2 or-4 formats of audio and video data, the main CPU MPC8250 through the PCI bus will compress the encoded audio and video data to files in the IDE interface hard drive or CDROM-R/w (operating system).

At the same time, the internal encoding can be VW2010 after a decoding audio and video data is output to the appropriate D/A converter, complete the user real-time playback.

Hardware design considerations

Use of embedded processors, relatively speaking in circuit design to simple, huaheng technology currently provides a development platform based on MPC8250 and reference designs, and VW2010 currently has mature PCI codec card.

Using out-of-the-box embedded Linux development platform and audio/video decoding card, users only need early in a peripheral interface board for simple extensions, you can quickly launch a product prototype, reduce the prophase exploitation of theCycle and costs. Upon completion of the preliminary engineering prototype and related software development, developers can further consolidation of the entire system, redesigned hardware circuit board.

Since the circuit complexity, using a high-speed digital circuit, plus on electromagnetic compatibility (EMC) of the design requirements, design hardware circuit to consider the following points:

1. for treatment of PCI and SDRAM and so control interface clock line, to minimize the length of the line and impedance matching, and calls on the circuit of high-speed clock line for copper shielding;

2. using six-layer circuit board, circuit noise can be reduced, improving the stability of the circuit;

3. for video A/D chip, should try to do analog and digital isolation.

Avoid digital circuit interference on analog circuit, improving precision of sampling;

4. for high speed data bus should add exclusion, in order to achieve the purpose of impedance matching.

And should minimize alignment length, reducing the circuit current loop area.

System software development

Codec has been able to achieve, the actual audio and video stream of the collection, storage and transport must be controlled and complete the operating system, you first need to realize is that under Linux VW2010 device driver.

Linux system device driver development technology has been very mature, specific use and will not repeat them here. Currently VW2010 already there on the PC platform is more widely used, the manufacturer has to provide the Linux operating system based on Windows, mature driver support.

Current popular board main has these features: watermark, Chinese OSD overlays, timestamp overlays, Logo overlays, Mosaic mask, single frame capture, mandatory key frame output, dynamic change compression frame rate parameters, dynamic adjustment of video parameters, dynamic change frame structures, dynamic detection, dual stream, onboard the encrypted zones.

General playback library supports file play and real-time streaming playback, variable speed playback, the playback capture, playback brightness contrast adjustment, dynamic drop-frame. Network library supports UDP/TCP transport support multicast (MultiCast) and bidirectional communication. Off-the-shelf decoding card, regardless of the PC-based or embedded platform development need to be considered related software development kit (SDK) for stability, usability, compatibility, functionality, integrity and service levels.

In addition to considering the card these basic functions, you also need to consider is the card manufacturer's product series are complete, the SDK is compatible with your card, thereby protecting software development effort.

For example, because there is no limit to the national standard DVR compression standard, there is no DVR system interconnection requirements, the manufacturer of the stream formats are not compatible, so if you have network centralized monitoring of demand on the video wall, necessarily require compression Board vendors hard decoding card, otherwise it will be difficult to achieve.

Off-the-shelf decoding card, lowers the threshold for the development of DVR product, but are often likely to be affected by the upstream vendors, suppliers, price, etc.

In the accumulation of sufficient technical experience can consider independent development, if developers use other codec chip, you can research a corresponding chip is widely applied to mature, the related manufacturers, agents, third-party can provide sufficient support.