Based on the wireless radio frequency transceiver Si4432A system design (1)

This article has designed a Wireless Transceiver IC Si4432 and C8051F930-chip RF transceiver system.

The system consists of sending module and receive module. Send module mainly the data will be sent after treatment by C8051F930, sent by Si4432; in the receive module, the data is correct Si4432 after it is received through the LCD display for short-distance wireless communication. The system enables low power consumption, small size, high sensitivity conditions of high-quality wireless data transfer.

1 Wireless Transceiver IC Si4432

Si4432 chip is Silicon Labs introduced a highly integrated, low power consumption, more band EZRadioPRO series wireless transceiver chip.

Its working voltage 1.9 ~ 3.6 V, 20-pin QFN (4 mm 4 mm×), can work in the 315/433/868/915 MHz four frequency bands; internal integrated diversity antenna, power amplifier, wake-up timer, digital modems, 64-byte FIFO for sending and receiving data, as well as configurable GPIO, etc. Si4432 when using external components required is small, 1 30 MHz crystal oscillator, several capacitance and inductance can form a high-reliability design of receiver and transmitter systems, simple and low cost.

Si4432 of receiver sensitivity reach-117 dB, can provide a very good link quality, expanding the transmission range while minimizing power consumption; the smallest filter bandwidth of up to 8 kHz, has excellent channel selectivity; 240 ~ 960 MHz band, not power amplifier with a maximum output power is up to + 20dBm, well-designed when receiving and distances up to 2 km.

Si4432 can apply to wireless data communication, wireless remote control system, a small wireless network, a small wireless data terminal, wireless meter reading, access control system, wireless sensing, and hydro-meteorological monitoring, robot control, wireless RS485/RS232 data communication.

2 wireless RF transceiver system design

2.1 system overall programme

Wireless RF transceiver system architecture diagram as shown in Figure 1, microprocessor controlled by C8051F930 Si4432 wireless data transceiver.

Send module C8051F930 will feed data to encode processing Si4432, and in a particular format via the antenna to receive module. Receiver module received RF signal amplification, demodulation, and then copies the data to the host controller C8051F930 accordingly, such as to send the liquid crystal display, etc. The system provides the keys and LCD (OCM12864-9) and other human-computer interaction interface, also have a RS232 interface can implement and PC communication.

2.2 system hardware design

Master chip selects Silicon Labs company introduced SCM C8051F930.

C8051F930 4 KB of RAM and 64 KB Flash, chip integrates rich peripheral modules (including serial, SPI, 10-bit A/D converter, etc.), is a great way to meet the system requirements for micro-controller; support for fast wake-up and supply the minimum 0.9 V; there are a variety of power management mode (such as normal, idle mode, Hibernate mode, etc.), the internal integration of the two built-in voltage detector for sleep mode and normal mode, typical Hibernate mode current of only 50 nA. C8051F930 contains 1 high efficiency DC-DC boost converter, up to 65 mW to internal micro-controller and other components, in order to reduce the normal mode of battery power, the power saving schema C8051F930 to operation mode of the current reduced to 170 μ M A/H z.

C8051F930 can be enhanced through built-in SPI on Si4432 internal register to read or write operation, flexible configuration parameters.

Through the SPI interface initialization done Si4432 configurations, reading and writing data, access, FIFO, and so on. Use 4-wire SPI, MISO, MOSI, SCK and nSEL. MOSI is used from C8051F930 to Si4432 serial data transmission; MISO from Si4432 to C8051F930 serial data transmission; SCK Si4432 C8051F930 and used for synchronization between the MOSI and MISO on serial data transmission; nSEL as a piece of selected signal, the signal is selected only if the slice low level, the action is only valid Si4432. Hardware design schematic diagram shown in Figure 2.

13 ~ 16 Si4432 feet are standard SPI interface, 17 feet (nIRQ) is interrupted status output pin.

When the FIFO overflow, there are valid packets sent or received, CRC error, detected leading digits and sync word, power-on reset and so on, and the corresponding interrupt is enabled, 17 feet will produce a low level to notify C8051F930 interrupt production. 20 feet (SDN) determines the Si4432 chip working state. When SDN grounding (SDN = 0), the chip is in general working model; received high level (SDN = 1), the chip is in a power-down mode. Power-down mode register content will be lost, and does not allow access to SPI, but chip current consumption of only 10 nA, power consumption is very low and therefore suitable for very low power requirement. After connecting to the power supply, the falling edge SDN at power-on reset, according to the directive to other work mode.

In order to achieve better communication results, Si4432 receive low noise amplifier matching circuit and transmitter power amplifier matching circuit resistor parameter should be strictly in accordance with the data sheet provided by the parameter selection.

Front-end of diversity-circuit use SKY13267, the V1 and v2 feet foot respectively connecting the GPIO1 and GPIO2 Si4432. Through the crossover switch diversity antenna to send and receive channels automatically switch.

2.3 system software design

Software programming has a modular design concept, the main function in the system module into independent function called by the main program.

Function module include: initialization procedures (including initialization C8051F930, SPI, Si4432), wireless, wireless receiver sent program procedures. Wireless forwarding program is responsible for writing data loading, and on the basis of the communication protocol for data loading and preamble, sync word, data loading length and CRC byte that formation of packets sent; the wireless receiver is responsible for receiving and checking the CRC bytes in the packet to make sure that the received data correctness.

Wireless transceiver module communication is sent in packets, the system-defined packet format is as follows:

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