SoPC technology in image acquisition and processing systems design (1)

With computer technology and the rapid development of artificial intelligence techniques, image recognition technology has become the foundation of artificial intelligence technology, which involves more and more widely in the fields of technology, applications and more in-depth.

With modern industrial production to high speed, automated way to shape is characteristic of the image recognition in the application of modern production is increasing, whether material, industrial automation, remote sensing technology, or product quality inspection needs to detect the shape. Therefore, the set image signal acquisition and processing of integrated, highly integrated, high confidentiality of image processing system will become the industry trends. In addition, based on 32 bit microprocessor pure embedded system image acquisition and processing technology is in the ascendant phase, development prospects, which can be widely used in industrial automation, monitoring/anti-theft systems, robot vision, etc. Altera SoPC technology is the company a flexible, efficient SoC solution, is a new hardware and software co-design system design technology. This system is in this context. Its main task is to design a practical image acquisition and processing platform, complete the target image acquisition input, and can capture to image processing and recognition.

1 system overall programme and hardware design

System requirements in the FPGA chip use SoPC technology portable image capture and processing.

It does this by scanning the original image, digital image processing and recognition to receive bulk load information (including text, avatar, fingerprints and other personal information) to appear on the LCD, and through the USB interface will copies of information, or information via the RS-232 interface will be uploaded to a PC, you can also access via GPRS to the information quickly and easily to the data center for validation.

A core part of the entire system is embedded Nios II soft core of FPGA, peripherals and chip including image acquisition devices, video and film, SDRAM and FLASH memory, input devices, etc.

System architecture diagram shown in Figure 1.

The system works is: the system configuration has completed, the video capture device gets video images, each frame image generated by the analog-digital conversion of the image data into the preprocessing module, after pre-processing of image data after being fed into the SDRAM memory, Nios II processors by images of subsequent processing and control.

The processed image by the DAC in the monitor display in real time.

1.1 image acquisition interface circuit design

This system uses United States OmiVision company digital color CMOS image sensor OV7640.

The resolution of 640 × 480 pixels, the image speed of 30 frames/s, take progressive scan mode, the output to a digital signal. Working principle figure 2.

Image acquisition procedure process is: first the Nios initialization OV7640 registers, including the status register (STA), the data and clock control register (CLKRC), automatic gain control (AGC) of the register; and then the query wait, barcode images are OV7640 acquisition after entering the data register through the DMA into SDRAM, Nios then extract data from SDRAM for decoding.

1.2 Nios-based hardware design of the SoPC

Based on the Nios SoPC system design of the entire core of the system hardware design, including Nios processor design, data acquisition and control design, image signal FFT analysis of realization, parameters, displays and RS232 communication module Design.

In addition, using Nios for embedded design in hardware required use of Altera FPGA company.

Nios processor core hardware design is based on the system of functional requirements for a custom fit CPU and peripherals, and SoPC and Quartus II.

In the hardware design process, you can flexibly customize many of the features Nios CPU even instruction, you can use the Altera IP Core provided to accelerate the development of the designers Nios peripherals and improve peripheral performance speed, or you can use a third-party IP Core, or the use of VHDL, Verilog customizable peripherals.

System Nios peripherals mainly include:

(1) CMOS image sensor interface module.

As a result of Altera did not provide CMOS image sensor interface module, using VHDL programming customizations. By VHDL programming design a CMOS image sensor control module, use the access mode of Avalon bus from custom peripherals.

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