Phase Shifter based on multiple clock module design of the instantaneous frequency measurement (1)

0 introduction

Currently, Pulse Radar pulse signal analyzing has been the study of hot and difficult, how to be more rapid, accurate to within carrier frequency pulse measurement become researchers focus on goals, at the same time high-precision frequency source in the radio and more widely in the field of application, on the frequency measurement devices have a higher demand and therefore on the new frequency methods on the development of low-cost, small size and easy to carry and use of the frequency measuring equipment has a very important significance.

This article under the radar transmitter frequency characteristics of rapid change, it adopts the new logical controller parts of new frequency measurement module, combined with equal precision interpolation frequency principle, to the shaping of the pulse is enlarged to direct counting down conversion after single pulse amplitude carrier fast frequency measurement. With high precision, measurement time is short, an instantaneous pulse radar single pulse frequency module.

1 phase clock counting measuring frequency principle

Phase clock counting to equal precision measuring frequency method, is a new kind of interpolation technology, multiple-frequency but different phase clock by FPGA internal PLL generated, and then delivered to the appropriate counter counts in real time the gates open at the same time count counter; actual gate is closed, then the total value is used to measure frequency operation.

Specific methods are: actual gate as key logic signals, through global clock wiring and four synchronization counter enable (cnt_ena) connected to as counter enable signal; Quad clock signal as counter clock, separately and 4 counter clock (clk) connected to achieve four counters on actual gate pulse count, the counter is set to rise in the clock and 1 count. Set of 4 counter values for ns1, ns2, ns3, ns4, assuming that the total value is n '' s, since each counter count value changes will make N ' s values change, the n21, ns2, ns3, ns4 corresponding count clock is interrelated 90 ° phase difference (Tdk/4 count time), the count value N '' s each Tdk/4 time increases by 1. Equivalent to the standard way to count clock 4 multiplier. At the end of a measurement (i.e. actual gate closed), and then use a formula to calculate real gate pulse width measurement values, and other precision measuring frequency formula:

Contrast style (1) and (2), the four counters count ns1, ns2, ns3, ns4 sum results as new count value for measuring frequency operation, its frequency results equivalent to the standard frequency 4 multiplier.

This conclusion may also be obtained from the point of view of the relative error, since equal precision measuring frequency of actual gate and the measured signal synchronization, so type (2) of the Nx quantization error does not exist. The actual gate and standard clocks are not synchronized, then n '' s ± 1 quantization error exists. The frequency of relative error is:

Because the count value N '' s almost 4 times for Ns,-(2) the corresponding error is-(1) corresponds to 1/4.

Through the four-phase clock frequency measurement, the measuring time and Datum clock frequency is not constant, the relative error of the measurement into the error of 1/4, measuring accuracy increased four times. To increase the capacity of phase-clock, the measurement accuracy is further enhanced.

2 new frequency module design

Use phase clock counting measuring module built instantaneous frequency to the frequency of measurement, the measuring frequency measurement object module is the pulse radar receiver down-conversion if signal after.

Overall design goal is to build a digital, integrated, automated testing platform that can meet the requirements of pulse-frequency-beta, can telecommute, and have some of the transplantations and upgrade of the basic framework for the establishment of a system like Figure 1.

The whole system working principle is: the operator through the PC interface to the module parameter settings and feature selection, man-machine interface of setpoint transmission via the serial port to a single-chip, microcontroller as measurement module control parts, control of FPGA and complete the measurement task, the FPGA is responsible for the specific frequency measurement algorithm implementation.

After testing, test results through a single interface to the PC, both through the RS232 serial port connection. The entire design of FPGA internal frequency measurement algorithm circuits as its core circuit.

3 FPGA frequency measurement algorithm circuits design

Use of Altera Corporation StratixII series EP2S15F484C5-FPGA core control unit.

Internal measuring frequency algorithm circuits include PLL output clock alignment, timing control unit, data processing unit. These units are the core of frequency measurement algorithm, you need to associate each element by mutual provided interface in FPGA internal connect, constitute the complete measuring frequency module, implementation, and other precision measuring frequency function. The input signal for 10 MHz clock signal, the signal pulse amplitude and the measured signal; output signal for the clock count values and NS the measured signal count nx, its principle is always the block diagram shown in Figure 2.

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